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ISL6293
Data Sheet January 4, 2006 FN9180.1
Li-ion/Li Polymer Battery Charger Accepting Two Power Sources
The ISL6293 is a fully integrated low-cost single-cell Li-ion or Li-polymer battery charger. The charger accepts two power inputs, normally one from a USB (Universal Serial Bus) port and another one from a desktop cradle. The ISL6293 is an ideal charger for smart handheld devices that need to communicate with a personal computer via USB. The ISL6293 features 28V and 7V maximum voltages for the cradle and the USB inputs respectively. The 28V rating allows low-cost adapters be safely used. When both inputs are powered, the cradle input is used to charge the battery. The charge current is independently programmable for both inputs with two small resistors. One additional USBP pin allows the selection of high-power or low-power port for the USB input. The charger is self-protected against over temperature. If the die temperature rises above 100C, a thermal foldback function reduces the charge current automatically to prevent further temperature rise. The charger preconditions the battery with low current when the battery voltage is below 2.6V. The charger has two indication pins. The PPR (power present) pin outputs an open-drain logic LOW when either the cradle or the USB input power is attached. The CHG (charge) pin is also an open-drain output that indicates a logic LOW when the charge current is above a minimum current level. When the charge current is below the minimum current, the charger remains in operation but the CHG pin indicates a logic HIGH signal.
Features
* Complete Charger for Single-Cell Li-ion/Polymer Batteries * Accept Two Power Sources * Low Component Count - Integrated Pass Element - Integrated Charge-Current Sensor with 10% Accuracy - No External Blocking Diode Required * Charge Current Thermal Foldback for Thermal Protection * 28V Maximum Voltage for the Cradle Input * Charge Indication * Adapter Presence Indication * Less than 1A Leakage Current off the Battery when No Input Power Attached * Ambient Temperature Range: -40C to 85C * Thermally-Enhanced 3x3 DFN Package * Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
* Smart Handheld Devices * Cell Phones, PDAs, MP3 Players * Digital Still Cameras * Handheld Test Equipment
Ordering Information
PART NUMBER ISL6293-2CR ISL6293-2CR-T ISL6293-2CRZ (Note) TEMP. RANGE PART (C) MARKING 93-2 93-2 932Z PACKAGE PKG. DWG. #
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Technical Brief TB389 "PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages"
-40 to 85 10 Ld 3x3 DFN L10.3x3 10 Ld 3x3 DFN Tape and Reel -40 to 85 10 Ld 3x3 DFN L10.3x3 (Pb-free) 10 Ld 3x3 DFN Tape and Reel (Pb-free)
Pinout
ISL6293-2 (10 LD 3X3 DFN) TOP VIEW
ISL6293-2CRZ-T 932Z (Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
CRDL USB PPR CHG EN
1 2 3 4 5
10 BAT 9 8 7 6 ICDL GND USBP IUSB
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL6293 Block Diagram
CRDL USB BAT
Temp Monitor CA + CPPR
ICDL IUSB USBP
+ VA Reference Current Control USB IR
VREF
CPPR
LBAT
CRDL BAT
ENA
PPR Control CHG
EN GND
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FN9180.1 January 4, 2006
ISL6293 Typical Applications
A Simple Charger Accepting Power from Both a USB Port and a Desktop Cradle
To Cradle Connector C1 To USB Connector To Battery CRDL BAT ICDL RICDL RIUSB R2 D1 R3 D2 C3
ISL6293-2
USB R1 C2
IUSB PPR CHG EN
500mA 100mA
USBP
GND
Disable Enable
COMPONENT SELECTION RICDL RIUSB R2, R3 C1, C2, C3 R1 D1, D2 1.82k for 0.8A cradle charge current 80k for 100mA/500mA USB charge current 470 1F ceramic capacitor 1 LEDs
A Simple Charger with Programmable Charge Current and Wide Input Voltage Range
BAT ICDL CRDL IUSB To Battery RICDL C2
USB To Cradle Connector C1
ISL6293-2
USBP PPR CHG EN GND
Disable Enable
COMPONENT SELECTION RICDL C1, C2 1.82k for 0.8A cradle charge current 1F ceramic capacitor
RIUSB is not required when the USB input of ISL6293-2 is left floating in the design for a single input charger.
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FN9180.1 January 4, 2006
ISL6293
Absolute Maximum Ratings
Supply Voltage (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Supply Voltage (CRDL) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V Signal Input Voltage (EN, USBP, ICDL, IUSB, BAT) . . . . -0.3V to 7V Open-Drain Pull-Up Voltage (PPR, CHG) . . . . . . . . . . . . -0.3V to 7V
Thermal Information
Thermal Resistance JA (C/W) JC (C/W) 3x3 DFN Package (Notes 1, 2) . . . . . . 46 4 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-40C to 85C Supply Voltage (USB Pin) . . . . . . . . . . . . . . . . . . . . . . 4.3V to 5.5V Supply Voltage (CRDL Pin) . . . . . . . . . . . . . . . . . . . . . . 4.3V to 24V Typical Cradle Charge Current . . . . . . . . . . . . . . . . . . 300mA to 1A Typical USB Charge Current . . . . . . . . . . . . . . . . 350mA to 450mA
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. 2. For JC, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER POWER-ON RESET Rising USB/CRDL Threshold Falling USB/CRDL Threshold VIN-BAT OFFSET VOLTAGE Rising Edge Falling Edge STANDBY CURRENT BAT Pin Sink Current CRDL Pin Supply Current USB Pin Supply Current CRDL/USB Pin Supply Current VOLTAGE REGULATION Output Voltage (Note 4) CRDL PMOS On Resistance USB PMOS On Resistance CHARGE CURRENT (Note 5) ICDL Pin Output Voltage IUSB Pin Output Voltage
Typical Values Are Tested at USB = CRDL = 5V and ambient temperature is at 25C, Unless Otherwise Noted. All Maximum and Minimum Values Are Guaranteed Under the Recommended Operating Conditions. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
3.4 3.2
3.7 3.5
4.0 3.8
V V
VOS VOS
VBAT = 4.0V, use CHG pin to indicate the comparator output (Note 3)
175 110
mV mV
ISTANDBY EN = HIGH or both inputs are floating ICRDL IUSB EN = LOW or floating EN = HIGH 150 150 0.55
1.0
A A
250
A mA
VCH
Charge current = 20mA VBAT = 3.8V, ICHARGER = 0.5A VBAT = 3.8V, ICHARGER = 0.35A
4.158
4.2 700 700
4.242
V m m
VICDL VIUSB
VBAT = 3.8V
1.17 0.776 720 9.2
1.20 0.8 800 13.2
1.23 0.824 880 17.2
V V mA %
CRDL Input Constant Charge Current CRDL Input Trickle Charge Current
ICHARGE RICDL = 1.82k, VBAT = 3.8V Valid for -10C to 85C ITRICKLE RICDL = 1.82k, VBAT = 2.4V Given as a percentage of the CRDL ICHARGE Valid for -10C to 85C
USB Input Constant Charge Current USB Input Trickle Charge Current (Note 4)
ICHARGE USBP = HIGH, RIUSB = 80k, VBAT = 3.8V ITRICKLE USBP = HIGH, RIUSB = 80k, VBAT = 2.4V Given as a percentage of the USB HIGH ICHARGE
380 8.0
440 10.0
500 12.0
mA %
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FN9180.1 January 4, 2006
ISL6293
Electrical Specifications
PARAMETER USB Input Constant Charge Current USB Input Trickle Charge Current Typical Values Are Tested at USB = CRDL = 5V and ambient temperature is at 25C, Unless Otherwise Noted. All Maximum and Minimum Values Are Guaranteed Under the Recommended Operating Conditions. (Continued) SYMBOL TEST CONDITIONS MIN 68 45.0 TYP 84 50.0 MAX 100 55.0 UNITS mA %
ICHARGE USBP = LOW, RIUSB = 80k, VBAT = 3.8V ITRICKLE USBP = LOW, RIUSB = 80k, VBAT = 2.4V Given as a percentage of the USB LOW ICHARGE
END-OF-CHARGE CURRENT THRESHOLD Powered From USB Pin IEOC USBP = HIGH, RIUSB = 80k Given as a percentage of the USB HIGH ICHARGE USBP = LOW, RIUSB = 80k Given as a percentage of the USB LOW ICHARGE RICDL = 1.82k, Given as a percentage of the CRDL ICHARGE 8.0 10.5 13.0 %
Powered From USB Pin
IEOC
17.0
21.0
25.0
%
Powered From CRDL Pin PRECONDITIONING CHARGE THRESHOLD Preconditioning Charge Threshold Voltage INTERNAL TEMPERATURE MONITORING Current Foldback Threshold (Note 5) LOGIC INPUT AND OUTPUT USBP Pin Logic Input High USBP Pin Logic Input Low USBP Pin Internal Pull Down Resistance EN Pin Logic Input High EN Pin Logic Input Low EN Pin Internal Pull Down Resistance CHG/PPR Sink Current NOTES:
IEOC
5.5
8.5
11.0
%
VMIN
2.5
2.6
2.7
V
TFOLD
85
100
115
C
2.0 0.4 1000 1.2 0.4 1000 Pin Voltage = 0.8V 15
V V k V V k mA
3. The 4.0V VBAT is selected so that the CHG output can be used as the indication for the offset comparator output indication. If the VBAT is lower than the POR threshold, no output pin can be used for indication. 4. The maximum and minimum limits are guaranteed over -40C to 70C ambient temperature range. 5. The charge current may be reduced by the thermal foldback function, depending on the heatsinking condition of the test setup. 6. The threshold value at which the charger output is reduced to near zero. Guaranteed by characterization or correlation to other test.
Functional Pin Description
CRDL (Pin 1)
Cradle input. This pin is usually connected to a cradle power input. The maximum input voltage is 28V. The charge current from this pin is programmable with the ICDL pin up to 1A. When this pin is connected to a power source, no charge current is drawn from the USB pin. A 1F or larger value ceramic capacitor is recommended for decoupling.
USBP pin when the RIUSB = 80k. A 1F or larger value ceramic capacitor is recommended for decoupling. It is also recommended to have a 1 resistor in series with the decoupling capacitor to prevent an over-shoot voltage when a USB hot plug event occurs.
PPR (Pin 3)
Power presence indication. This is an open-drain output pin that outputs a logic LOW when either the USB input voltage or the CRDL input voltage is above its POR level, regardless if the charger is enabled or disabled. This pin provides a wake-up signal to a microprocessor when either the cradle or the USB power is connected.
USB (Pin 2)
USB input. This pin is usually connected to a USB port power connector. Other sources that are lower than 5.5V are also acceptable. The charge current from the USB pin is selectable between 100mA and 500mA maximum with the
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FN9180.1 January 4, 2006
ISL6293
CHG (Pin 4)
Charge indication pin. When the charge current from the cradle input during the constant current mode falls to below 8% of the programmed reference current by the ICDL pin or the charge current from the USB input is below 10% of the programmed charge current, the open-drain MOSFET is turned off. The pin will be pulled to logic HIGH by an external resistor to indicate the End Of Charge.
RICDL (k) Ratio TABLE 1. RATIO vs. RICDL 1.5 1291 2.2 1216 3.0 1155 3.9 1122 4.6 1088
It is recommended that the charge current be programmed in the range of 300mA to 1A.
EN (Pin 5)
Enable logic input. Connect to LOW or leave floating to enable the charger.
RATIO
1280 1250 1220 1190 1160 1130 1100 1070 1 2 3 RICDL (k) 4 5
IUSB (Pin 6)
The IUSB pin programs the USB charge current. This pin is regulated to 0.8V. The current flowing out of this pin is mirrored to the USB charge current control reference. When the USBP pin is connected to logic HIGH, the typical USB charge current can be found as:
V REF 0.8V I USB = 45000 ----------------- = 45000 x ----------------- ( A ) R IUSB R IUSB
The RIUSB has a programming range of 80k to 103k, thus the USB current has a nominal value ranging from 350mA to 450mA. When the USBP pin is driven to logic LOW, the charge current is approximately 1/5 of the above value.
FIGURE 1. THE RATIO USED IN THE CHARGE CURRENT CALCULATION vs. RICDL
USBP (Pin 7)
USB port selection logic input. When this pin is left floating or driven to logic LOW, the USB port is regarded as a low-power port, in such case the charge current is 100mA maximum. When this pin is driven to logic HIGH, the USB port is considered a high-power port, and the charge current is 500mA maximum. The ratio of the charge current when this pin is HIGH or LOW is fixed at approximately 5:1.
The second function of the ICDL pin is to monitor the actual charge current. The voltage of this pin, VICDL, is proportional to the actual charge current, ICHG, in either the USB or the cradle charger. When the cradle charger or the USB charger is working with USBP connected to logic HIGH, the ICDL pin voltage is given by the following equation:
R ICDL I CHG 1.20V V ICDL = --------------- I CHG = ----------------------------------I CDL ratio
where the ratio has the same value given in Table 1. The cradle charge current should be programmed equal or higher than the USB current; otherwise, the ICDL pin voltage will be higher than 1.20V during the constant current phase when the USB charger is working. The charger still works properly but the accuracy of the current monitoring voltage degrades and saturates at approximately 2.1V. When the USB charger is working with the USBP pin connected to logic LOW, the ICDL pin voltage is approximately five times of the above equation.
GND (Pin 8)
System ground.
ICDL (Pin 9)
The ICDL pin has two functions. The first function is to program the cradle charge current during the constantcurrent phase. The voltage of this pin is 1.20V during the constant-current phase of the cradle input charger. The constant-current is programmed by the following equation:
1.20V I CDL = ---------------- ratio R ICDL (A)
BAT (Pin 10)
Charger output pin. Connect this pin to the battery pack or the battery cell. A 1F or larger value ceramic capacitor is recommended for decoupling. The charger relies on the battery for stability so a battery should always be connected to the BAT pin.
where RICDL is the resistor connected to the ICDL pin (see Typical Application). The ratio is given by the following table and curve.
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FN9180.1 January 4, 2006
ISL6293 Description
The ISL6293 is designed for a single-cell Li-ion or Li-polymer battery charging circuit that accepts both a USB port and a desktop cradle as its power source. The charge current from each power source is independently programmable but only one of the two sources charges the battery. The following describes the operation of the charger.
Floating Charge Voltage
The floating voltage during the constant voltage phase is 4.2V. The floating voltage has an 1% accuracy over the ambient temperature range of -40C to 70C.
Trickle Charge Current
When the battery voltage is below the minimum battery voltage VMIN given in the electrical specification, the charger operates in a trickle/preconditioning mode. If power comes from the cradle, the trickle mode current is
1.20V I TRICKLE = ---------------- 100 R ICDL (A)
Input Auto Selection
When both input sources are present, the charger selects only one power source to charge the battery. When the CRDL input is higher than both the POR threshold and the battery voltage, CRDL is selected as the power source. Otherwise the USB input is selected. If the CRDL input voltage is below the battery voltage but the USB input voltage is higher than the battery voltage, then the USB input is used to charge the battery. The control circuit always breaks both internal power devices before switching in one power source to avoid any simultaneous conduction of both power MOSFETs. When the BAT pin voltage is below 1.7V, the charger selects the CRDL input as the power source. Hence, if the USB input is powered, the charger will not charge the battery.
The trickle current is 45mA if the power comes from the USB port with RIUSB = 80k.
End-of-Charge Indication
The CHG pin outputs a logic HIGH by turning off the internal open-drain MOSFET when the charge current falls below 8% of the constant current mode current for the cradle input or 10% for the USB input when RIUSB is 80k. The charger, however, does not turn off as long as an input power source is attached.
USB Charge Current
When the USB port is selected as the power source, the charge current is programmed by the logic input USBP pin. With the RIUSB selected at 80k, when the USBP is driven to logic LOW, the charge current is set to 90mA. When the USBP is driven to logic HIGH, the charge current is set to 450mA. The USBP is equivalent to a logic LOW when left floating. Typically the P-channel MOSFET for the USB input has an rDS(ON) of 700m at room temperature, thus with a 500mA charge current, the typical head room is 350mV. If the input voltage drops to a level that the voltage different between the USB pin and the BAT pin is less than 350mV, the rDS(ON) becomes a limiting factor of the charge current and the charge current drops out the constant current regulation.
Power Presence Indication
When either the USB or the cradle input voltage is above the POR level, the PPR pin outputs a logic LOW signal to indicate the presence of input power.
Cradle Charge Current
The cradle charge current is programmed with the external resistor connected between the ICDL pin and the GND pin. The current can be calculated with the equation given in the ICDL pin description. The typical rDS(ON) value of the Pchannel MOSFET for the CRDL input is 700m at room temperature, thus when the head room between the input and output voltages is small, the actual charge current, similar to the USB case, could be limited by the rDS(ON). On the other hand, if the head room between the input and output voltages is large, the charge current maybe limited by the thermal foldback threshold due to the increased power dissipation.
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FN9180.1 January 4, 2006
ISL6293 Dual Flat No-Lead Plastic Package (DFN)
2X A D 0.15 C A 2X 0.15 C B
L10.3x3
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 MIN 0.80 NOMINAL 0.90 0.20 REF 0.18 0.23 3.00 BSC 1.95 2.00 3.00 BSC 1.55 1.60 0.50 BSC 0.25 0.30 0.35 10 5 0.40 1.65 2.05 0.28 MAX 1.00 0.05 NOTES 5,8 7,8 7,8 8 2 3 Rev. 3 6/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389.
C L
6 INDEX AREA TOP VIEW
E
A3 b D
B
D2 E E2
0.10 C
e k L
A C SEATING PLANE SIDE VIEW
0.08 C
A3
N Nd
7 (DATUM B) 6 INDEX AREA (DATUM A) 1 2 D2
8
D2/2 NX k E2 E2/2
NX L N 8 N-1 e (Nd-1)Xe REF. BOTTOM VIEW 0.415 NX (b) 5 SECTION "C-C" C NX b (A1) 0.200 NX L NX b 5 0.10 M C A B
L e CC TERMINAL TIP
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
FN9180.1 January 4, 2006

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